This invention relates generally to digital to analog converters (DACs) and more particularly to resistor string type DACs adapted for integrated circuit fabrication.
As is known in the art, DACs have been used in a wide variety of applications to convert an N-bit digital word into a corresponding analog signal. One such DAC includes a string of 2.sup.N resistors having substantially the same resistance serially connected across a reference voltage. Thus, the resistor string divides the reference voltage among the resistors in the string. A switching network is provided for coupling the voltage at one of the resistors to an output to produce the converted voltage. While such DAC is suitable for applications where N is relatively small, when N is large, for example, where N is in the order of twelve, 4,096 resistors, 4,096 switches, and 4,096 control lines are required thereby resulting in a relatively large number of elements to be fabricated on an integrated circuit chip.
One technique suggested to reduce the number of elements is to use a segmented converter. In a segmented converter, a first stage uses a resistor string for converting a group of higher order bits of the N-bit digital word and a second stage decodes the remaining, lower order bits. A non-linear converter of that general type is shown in an article by Gryzbowski et al., entitled "Non-liner Functions from D/A Converters", Electronic Engineering 1971, pgs. 48-51. The converter disclosed in that article is designed for operation with relay switching and is not readily adapted to modern semiconductor technology. Another segmented converter is described in U.S. Pat. No. 3,997,892, issued December 1976, inventor Susset. The segmented converter described in U.S. Pat. No. 4,543,560 includes a resistor string for both the first and second stages with buffer amplifiers between the stages to prevent the second stage resistor string from loading the first resistor string.
Still another type of segmented converters is described in U.S. Pat. No. 4,338,591 issued Jul. 6, 1982, inventor Michael G. Tuthill, assigned to the same assignee as the present invention. Here, a resistor string is used for the first stage, an R-2R DAC is used for the second stage and buffer amplifiers are used between the first and second stages to reduce the effect of loading by the second stage on the first stage. The voltage produced across a selected one of the resistors in the first resistor string is fed across the second resistor string through the buffer amplifiers.
A third type of segmented DAC is described in U.S. Pat. No. 5,495,245, issued Feb. 27, 1996, inventor James J. Ashe, assigned to the same assignee as the present invention. The DAC described therein includes a pair of first stage resistor strings coupled to a second resistor string through a first switching network. A pair of reference voltages are coupled to the pair of resistor strings. The first switching network operates such that a voltage produced at a selected one of the resistors in one of the pair of first stage resistor strings and a voltage produced at a selected one of the resistors in the other one of the pair of first resistor strings are coupled across the second stage resistor string. A second switching network couples an output at a selected one of the resistors in the second resistor string to an output of the DAC. Buffer amplifiers are not included between the pair of first stage resistor strings and the second stage resistor string. Two arrangements are described. In one arrangement, the first switching network responds to the MSBs and the second switching network responds to the LSBs. In the other arrangement, the first switching network responds to the LSBs and the second switching network responds to the MSBs. In former arrangement, each resistor in the pair of resistor strings has a value 2.sup.N R, where R is the resistance of each of the 2.sup.N/2 resistors in the second resistor string. In the latter arrangement, each resistor in the second resistor string has a value 2.sup.N/2 R, where R is the resistance of each resistor in the pair of first resistor strings. In both arrangements, the entire current passing between the pair of reference voltages passes through the resistors. Therefore, while such arrangements are useful in many applications the relatively high number of resistors which are required in both the first and second pairs of resistor strings thereby requiring relative large chip surface area for their fabrication.